Server processors with computing cores of the first “Neoverse” generation N1 such as Amazon Graviton2 and Ampere Altra are already running in data centers. ARM announced its successor Neoverse V1 and N2 at the end of 2020 and is now providing further details, such as the Scalable Vector Extensions (SVE and SVE2), the new ARMv9 architecture and computing power.
According to ARM, the Neoverse V1 cores (Zeus) with SVE are primarily intended for supercomputers, i.e. for high performance computing (HPC) – this is also demonstrated by the Fujitsu A64X from the current Top500 leader, Fugaku with SVE. The EU processor Rhea, which SiPearl is developing for the European Processor Ininiative (EPI), relies (among other things) on Neoverse V1, but also an upcoming HPC processor from the Indian Ministry of Electronics and Information Technology (MeitY).
With the Neoverse N2 (Perseus) the HPC computing power is not quite as high, here all-purpose servers are in the foreground. Neoverse N2 is the first ARM core for servers with ARMv9 architecture, which also includes the leaner SVE implementation SVE2. According to ARM, Marvell is currently developing a new generation of Octeon network processors with Neoverse N2.
Unlike the x86 server processors from AMD (Epyc) and Intel (Xeon), ARM does not use simultaneous multithreading (SMT) in the Neoverse cores. Each core executes exactly one thread, which, according to ARM, also serves security, because some side-channel attacks of the Specter class misuse functions of the CPU resources shared by several threads. According to ARM, Neoverse N2 processors should provide more computing power per core than current x86 processors per thread. Upcoming Neoverse N2 processors with around 100 cores should therefore deliver more computing power than Epycs and Xeons with comparable power consumption.
But there are also ARM server cores with SMT on the market, such as the Marvell ThunderX3.
5G networks devour computing power
Just like Intel, ARM expects that the global development and expansion of 5G wireless networks, for example with Open-RAN, will bring great market opportunities for servers (processors), because this requires a lot of computing power. ARM emphasizes that the powerful Neoverse cores can be easily integrated into systems-on-chip (SoCs) with special arithmetic units for 5G functions.
However, when presenting the IDM 2.0 contract manufacturing concept, Intel also emphasized that it should be possible to combine x86 cores from Intel with special arithmetic units from the respective client.
Bfloat16, CMN-700 and CXL
The SVE (2) calculators from Neoverse V1 and N2 also process the AI data format Bfloat16 (BF16). In addition, ARM announces the improved Core Mesh Network CMN-700 for the internal connection of computing cores, memory controllers and interfaces in SoCs. The CMN-700 not only achieves significantly higher data transfer rates than its predecessor, it also connects to the coherent CXL interface for computing accelerators.